Verification and benchmark cases

A circuit-aware optimisation model should be tested at four levels: algebraic identities, closed-form topology limits, published cases, and a higher-fidelity oracle. A solver returning LOCALLY_SOLVED is necessary, but not sufficient.

Tests implemented in the package

These tests live in test/advanced_inverter_tests.jl and test/inverter_control_tests.jl. They intentionally include balanced cases, pure sequence excitations, strong mixed unbalance, and binding limits. A balanced feeder alone cannot validate a four-wire topology because it removes the very neutral and ripple mechanisms being tested.

Numerically demanding PWM-reserve and DC-link closure regressions use the per-unit formulation. Raw SI is retained for representative, well-scaled AdvancedInverter unit-conversion checks. The coupled phase-aware controller requires per-unit stamping and rejects raw SI because its saturated convergence is not sufficiently reliable.

The controller derivations and calling conventions are documented in the phase-aware inverter-control API. This page is the canonical claim-to-test map and publication gate. In particular, neither a balanced OpenDSS comparison nor the four-leg/three-single-phase reduction validates negative-sequence control or shared-DC-link dynamics; those are mechanism tests, not universal model equivalences.

Infeasibility triage for fleet studies

Never discard a failed or non-publishable snapshot. Retain scenario identifiers, termination status, starts, and all available residuals. Re-run it in the following diagnostic order: zero controller objective, wider smoothing via continuation, relaxed experimental service commands, and finally individually relaxed physical limits. Classify the first relaxation that restores a solution as controller-equilibrium, numerical-conditioning, or physical-capability failure. Report each class as a fraction of every penetration cohort. Only a physical-limit relaxation may support a hardware-sizing conclusion, and only after multiple starts and a higher-fidelity representative case.

Published cases worth lifting next

Heidari and Geth (2024)

Their four-conductor algebraic model provides equation-level cases for:

1. a non-zero neutral series impedance under zero-sequence current;
2. equality between internal and external powers plus full conductor losses;
3. 3-leg versus 4-leg feasible regions under the same unbalanced POC voltage;
4. independent positive-, negative-, and zero-sequence current caps; and
5. balanced internal voltage under a GFM constraint.

The present suite covers the first, second, fourth, and fifth as invariants. The first two now exercise both diagonal and mutually coupled primitive conductor matrices. A direct digitisation of their plotted three-leg/four-leg capability boundaries would add a valuable paper-to-code regression.

Deakin, Heidari, and Deng (2025)

Table V is especially useful because the voltage and six current phasor patterns are fully prescribed. It tests the unconjugated-product convention without depending on an OPF optimum. Tables VI-VII then separate formula error from PLECS controller/filter effects. All six Table VII rows are now literal regression data. For the four non-cancelling cases, analytical and PLECS 2ω powers agree within 0.3%, and the associated reported currents within 1%; the balanced active/reactive rows retain their small numerical residuals. The package separately tests its time-domain RMS capacitor current, which divides a sinusoidal Fourier magnitude by $\sqrt2$. The table's $P_{2\omega}/V_{dc}$ current convention must not be used as an RMS bank rating without that conversion. A machine-readable PLECS waveform archive would still be stronger than copied summary values.

Deakin, Heidari, and Deng (2026)

The OPF parameter sweeps in Figs. 4-6 are useful monotonic and ordering tests:

• increasing capacitor ripple rating cannot shrink the feasible set;
• a monolithic 4-leg link does not route neutral current through its capacitor;
• a split link trades neutral capability against capacitor ripple headroom; and
• reconfigurable four-leg-plus-split hardware dominates a fixed allocation when all other ratings are equal.

The first three properties are covered, including unequal split half-banks and frequency-weighted bank ratings. The final one must wait for an explicit hybrid topology; using the current :FOUR_LEG result as its surrogate would be a model error.

Mandrioli et al. (2021) and Hammami et al. (2020)

Mandrioli et al. give balanced-load RMS closed forms for sinusoidal PWM and centered continuous PWM. These are unusually clean unit-test oracles because they isolate shared-carrier correlation from the OPF optimum. The package now evaluates both formulas at three modulation indices, then separately checks current, capacitance, and switching-frequency scaling. Hammami et al. provide the complementary three-phase four-wire split-capacitor derivation. The present split-link test exercises asymmetric half-banks and the series-equivalent bus capacitance, but digitising several of their modulation/load-angle maps remains a useful independent regression target.

Mandrioli et al. (2021), Viatkin et al. (2021), and the 2023 generalization

The split-capacitor paper provides closed-form phase and neutral switching RMS currents under SPWM. Equations (15) and (27) are now literal tests at three modulation indices, including the predicted 1/(L f_sw) scaling. Viatkin et al. add an explicit neutral inductor to the four-leg circuit; the package tests their central monotonic result that increasing the neutral-to-phase inductance ratio suppresses neutral ripple. The 2023 generalized treatment covers many common-mode injections and hundreds of simulation/experimental operating conditions. Its published numeric archive would be the best next fixture for DPWM, THIPWM, and strategy-dependent neutral-inductor validation.

Outstanding oracle: the exact-law fixed point

The controller suite compares the exact and smooth laws at the smooth model's own solved point, reusing that solve's converter voltage and both filter-arm currents for the exact evaluation. That is the right test for the smoothing of the controller algebra, and it is not a test of the equilibrium.

A firmware controller does not evaluate its law at the smooth model's solution; it iterates against the network until its own command and the resulting voltage agree. The missing oracle is therefore a Picard/Gauss–Seidel iteration:

1. start from an uncontrolled power flow;
2. evaluate evaluate_exact at the current POC phasors;
3. impose the resulting phase currents on the plant and re-solve;
4. repeat to a fixed point, recording the iteration count and any cycling; and
5. report $\|\Delta V\|_\infty$ and the phase-current difference against the stamped smooth equilibrium for the same case.

Until that exists, equilibrium-level agreement between the deployed law and the network surrogate is an assumption, not a tested property, and it should be stated as such in any paper using these results. The iteration is also the natural place to observe non-existence or non-uniqueness of the local-droop equilibrium, which has its own literature (Farivar, Chen, and Low; Zhu and Liu) and is not addressed anywhere in this package.

Recommended higher-fidelity test harness

For each topology, build one parameter-identical averaged or switched model in PLECS, PSCAD, or an open EMT tool and export machine-readable sweeps. A compact validation matrix should vary:

• positive/negative/zero-sequence voltage independently;
• active/reactive current angle and current magnitude;
• DC voltage, capacitance, and half-bank mismatch;
• midpoint-balancer charge authority, bandwidth, and loss;
• phase and neutral inductance/resistance;
• converter-side/grid-side LCL split, capacitance, damping, and grid impedance;
• modulation index, sampling density, and switching strategy; and
• capacitor ESR versus frequency and temperature.

Compare converter/midpoint/POC fundamental phasors, both arm currents, filter- capacitor current and damping loss, mean P/Q, $|I_0|,|I_1|,|I_2|$, neutral RMS, $|\widetilde S|$, DC-bus 2ω amplitude and phase, midpoint fundamental RMS and mean offset, each half-bank's current spectrum, temperature, and loss. Store inputs and expected outputs in a versioned CSV/JSON fixture rather than recreating a plotted curve by eye.

Suggested acceptance bands are exact/near-machine tolerance for algebraic identities, below 0.5% for closed-form ideal cases, and study-specific bands for EMT comparisons. For switched simulations, report the Fourier window, transient discard interval, RMS/peak convention, switching frequency, controller bandwidth, and whether the DC source absorbs 2ω power.

Model-risk checks before publication

For every claimed boundary point:

1. check the per-unit base against the device ratings. Ratings are stamped as squared per-unit inequalities, and Ipopt's bound_relax_factor floors its relaxation at max(1, |bound|), so the admissible physical violation grows as s_base²: a 20 kVA rating is honoured to ~0.25 VA at s_base=1e6 but exceeded by ~2.4 kVA (12 %) at s_base=1e8. Keep s_base within a couple of decades of the ratings or pass bound_relax_factor=0. The mechanism and the durable fix are documented on AdvancedInverter. No hardware-sizing claim should be published from a base that has not been checked this way;
2. require non-negative switching_margin, increase n_samples, and demonstrate convergence;
3. for PWM-enabled points, require non-negative pwm_reserve_margin and pwm_modulation_margin, require every AC *_reserved value to cover its predicted ripple, then refine both sampling grids and pwm_ac_harmonics;
4. resolve from more than one physically sensible initial point;
5. check all reported conductor, sequence, rail, and capacitor residuals;
6. perturb the operating point inside and outside the claimed boundary;
7. state whether each value is RMS, peak amplitude, or Fourier magnitude; and
8. compare at least one representative point with a higher-fidelity oracle.

For an explicit LCL case, also verify that the fundamental frequency is well separated from every passive modal resonance and that the resonance remains acceptably damped after controller delay and grid impedance are included. The reported scalar filter_resonance_hz is only an initial screening number.

The maintained sources behind these tests are listed in IBR references.